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an important notice at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. production data. tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 tl07 xx low-noise jfet-input operational amplifiers 1 1 features 1 ? low power consumption ? wide common-mode and differential voltage ranges ? low input bias and offset currents ? output short-circuit protection ? low total harmonic distortion: 0.003% (typical) ? low noise v n = 18 nv/ hz (typical) at f = 1 khz ? high-input impedance: jfet input stage ? internal frequency compensation ? latch-up-free operation ? high slew rate: 13 v/ s (typical) ? common-mode input voltage range includes v cc+ 2 applications ? motor integrated systems: ups ? drives and control solutions: ac inverter and vf drives ? renewables: solar inverters ? pro audio mixers ? dlp front projection system ? oscilloscopes 3 description the tl07xx jfet-input operational amplifiers incorporate well-matched, high-voltage jfet and bipolar transistors in a monolithic integrated circuit. the devices feature high slew rates, low-input bias and offset currents, and low offset-voltage temperature coefficient. the low harmonic distortion and low noise make the tl07x series ideally suited for high-fidelity and audio pre-amplifier applications. the tl071 device has offset pins to support external input offset correction. device information (1) part number package body size (nom) tl07 xxd soic (14) 8.65 mm 3.91 mm soic (8) 4.90 mm x 3.90 mm tl07xxjg cdip (8) 9.59 mm x 6.67 mm tl074xj cdip (14) 19.56 mm 6.92 mm tl07xxp pdip (8) 9.59 mm x 6.35 mm tl07xxps so (8) 6.20 mm x 5.30 mm tl074xn pdip (14) 19.3 mm 6.35 mm tl074xns so (14) 10.30 mm 5.30 mm tl07xxpw tssop (8) 4.40 mm x 3.00 mm tl074xpw tssop (14) 5.00 mm 4.40 mm (1) for all available packages, see the orderable addendum at the end of the data sheet. logic symbols productfolder +? +? in+ in? out in+ in? out tl072 (each amplifier) tl074 (each amplifier) tl071 offset n1 offset n2 copyright ? 2017, texas instruments incorporated support &community tools & software technical documents ordernow
2 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated table of contents 1 features .................................................................. 1 2 applications ........................................................... 1 3 description ............................................................. 1 4 revision history ..................................................... 2 5 pin configuration and functions ......................... 4 6 specifications ....................................................... 10 6.1 absolute maximum ratings .................................... 10 6.2 esd ratings ............................................................ 10 6.3 recommended operating conditions ..................... 10 6.4 thermal information: tl071x .................................. 11 6.5 thermal information: tl072x .................................. 11 6.6 thermal information: tl072x (cont.) ....................... 11 6.7 thermal information: tl074x .................................. 11 6.8 thermal information: tl074x (cont). ....................... 12 6.9 thermal information: tl074x (cont). ....................... 12 6.10 electrical characteristics: tl071c, tl072c, tl074c .................................................................... 13 6.11 electrical characteristics: tl071ac, tl072ac, tl074ac .................................................................. 14 6.12 electrical characteristics: tl071bc, tl072bc, tl074bc .................................................................. 15 6.13 electrical characteristics: tl071i, tl072i, tl074i ...................................................................... 16 6.14 electrical characteristics: tl071m, tl072m ........ 17 6.15 electrical characteristics: tl074m ....................... 18 6.16 switching characteristics: tl07xm ....................... 19 6.17 switching characteristics: tl07xc, tl07xac, tl07xbc, tl07xi ..................................................... 19 6.18 typical characteristics .......................................... 20 6.1 parameter measurement information ..................... 25 7 detailed description ............................................ 26 7.1 overview ................................................................. 26 7.2 functional block diagram ....................................... 26 7.3 feature description ................................................. 27 7.4 device functional modes ........................................ 27 8 application and implementation ........................ 28 8.1 application information ............................................ 28 8.2 typical application .................................................. 28 8.3 unity gain buffer ..................................................... 29 8.4 system examples ................................................... 30 9 power supply recommendations ...................... 32 10 layout ................................................................... 32 10.1 layout guidelines ................................................. 32 10.2 layout example .................................................... 33 11 device and documentation support ................. 34 11.1 documentation support ........................................ 34 11.2 related links ........................................................ 34 11.3 community resources .......................................... 34 11.4 trademarks ........................................................... 34 11.5 electrostatic discharge caution ............................ 34 11.6 glossary ................................................................ 34 12 mechanical, packaging, and orderable information ........................................................... 35 4 revision history note: page numbers for previous revisions may differ from page numbers in the current version. changes from revision m (february 2014) to revision n page ? updated data sheet text to latest documentation and translation standards ......................................................................... 1 ? added tl072m and tl074m devices to data sheet ............................................................................................................. 1 ? rewrote text in description section ....................................................................................................................................... 1 ? changed tl07x 8-pin pdip package to 8-pin cdip package in device information table .................................................. 1 ? deleted 20-pin lccc package from device information table ............................................................................................. 1 ? added 2017 copyright statement to front page schematic ..................................................................................................... 1 ? deleted tl071x fk (lccc) pinout drawing and pinout table in pin configurations and functions section ........................ 4 ? updated pinout diagrams and pinout tables in pin configurations and functions section ................................................... 5 ? deleted differential input voltage parameter from absolute maximum ratings table ......................................................... 10 ? deleted table notes from absolute maximum ratings table ............................................................................................... 10 ? added new table note to absolute maximum ratings table ................................................................................................ 10 ? changed minimum supply voltage value from ? 18 v to ? 0.3 v in absolute maximum ratings table ................................. 10 ? changed maximum supply voltage from 18 v to 36 v in absolute maximum ratings table ............................................... 10 ? changed minimum input voltage value from ? 15 v to v cc ? ? 0.3 v in absolute maximum ratings table ........................... 10 ? changed maximum input voltage from 15 v to v cc ? + 36 v in absolute maximum ratings table ....................................... 10 ? added input clamp current parameter to absolute maximum ratings table ....................................................................... 10 ? changed common-mode voltage maximum value from v cc+ ? 4 v to v cc+ in the recommended operating conditions table .................................................................................................................................................................... 10
3 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated revision history (continued) ? changed devices in recommended operating conditions table from tl07xa and tl07xb to tl07xac and tl07xbc .............................................................................................................................................................................. 10 ? added tl07xi operating free-air temperature minimum value of ? 40 c to recommended operating conditions table ... 10 ? added u (cfp) package thermal values to thermal information: tl072x (cont.) table ...................................................... 11 ? added w (cfp) package thermal values to thermal information: tl074x (cont.) table ..................................................... 12 ? added figure 20 to table 1 ................................................................................................................................................. 20 ? added figure 20 to typical characteristics section ............................................................................................................. 24 ? added second typical application section application curves ............................................................................................ 29 ? reformatted document references in layout guidelines section ........................................................................................ 32 ? updated formatting of document reference in related documentation section .................................................................. 34 changes from revision l (february 2014) to revision m page ? added device information table, pin configuration and functions section, esd ratings table, feature description section, device functional modes , application and implementation section, power supply recommendations section, layout section ........................................................................................................................................................... 1 ? moved typical characteristics into specifications section. ................................................................................................. 20 changes from revision k (january 2014) to revision l page ? moved t stg to handling ratings table .................................................................................................................................. 10 ? added device and documentation support section ............................................................................................................. 34 ? added mechanical, packaging, and orderable information section ..................................................................................... 34 changes from revision j (march 2005) to revision k page ? updated document to new ti datasheet format - no specification changes. ......................................................................... 1 ? added esd warning ............................................................................................................................................................. 34
4 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 5 pin configuration and functions tl071x d, p, and ps package 8-pin soic, pdip, so top view nc- no internal connection pin functions: tl071x pin i/o description name no. in ? 2 i inverting input in+ 3 i noninverting input nc 8 ? do not connect offset n1 1 ? input offset adjustment offset n2 5 ? input offset adjustment out 6 o output vcc ? 4 ? power supply vcc+ 7 ? power supply 1 offset n1 8 nc 2 in 7 vcc+ 3 in+ 6 out 4 vcc 5 offset n2 not to scale
5 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated tl072x d, jg, p, ps and pw package 8-pin soic, cdip, pdip, so top view pin functions: tl072x pin i/o description name no. 1in ? 2 i inverting input 1in+ 3 i noninverting input 1out 1 o output 2in ? 6 i inverting input 2in+ 5 i noninverting input 2out 7 o output vcc ? 4 ? power supply vcc+ 8 ? power supply 1 1out 8 vcc+ 2 1in 7 2out 3 1in+ 6 2in 4 vcc 5 2in+ not to scale
6 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated tl072x u package 10-pin cfp top view nc- no internal connection pin functions: tl072x pin i/o description name no. 1in ? 3 i inverting input 1in+ 4 i noninverting input 1out 2 o output 2in ? 7 i inverting input 2in+ 6 i noninverting input 2out 8 o output nc 1, 10 ? do not connect vcc ? 5 ? power supply vcc+ 9 ? power supply 1 nc 10 nc 2 1out 9 vcc+ 3 1in 8 2out 4 1in+ 7 2in 5 vcc 6 2in+ not to scale
7 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated tl072 fk package 20-pin lccc top view nc- no internal connection pin functions: tl072x pin i/o description name no. 1in ? 5 i inverting input 1in+ 7 i noninverting input 1out 2 o output 2in ? 15 i inverting input 2in+ 12 i noninverting input 2out 17 o output nc 1, 3, 4, 6, 8, 9, 11, 13, 14, 16, 18, 19 ? do not connect vcc ? 10 ? power supply vcc+ 20 ? power supply 4 nc 5 1in 6 nc 7 1in+ 8 nc 9 nc 10 vcc 11 nc 12 2in+ 13 nc 14 nc 15 2in 16 nc 17 2out 18 nc 19 nc 20 vcc+ 1 nc 2 1out 3 nc not to scale
8 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated tl074 d, n, ns, pw, j, and w packages 14-pin soic, pdip, so, tssop, cdip and cfp top view pin functions: tl074x pin i/o description name no. 1in ? 2 i inverting input 1in+ 3 i noninverting input 1out 1 o output 2in ? 6 i inverting input 2in+ 5 i noninverting input 2out 7 o output 3in ? 9 i inverting input 3in+ 10 i noninverting input 3out 8 o output 4in ? 13 i inverting input 4in+ 12 i noninverting input 4out 14 o output v cc ? 11 ? power supply v cc+ 4 ? power supply 1 1out 14 4out 2 1in 13 4in 3 1in+ 12 4in+ 4 vcc+ 11 vcc 5 2in+ 10 3in+ 6 2in 9 3in 7 2out 8 3out not to scale
9 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated tl074 fk package 20-pin lccc top view nc- no internal connection pin functions: tl074x pin i/o description name no. 1in ? 3 i inverting input 1in+ 4 i noninverting input 1out 2 o output 2in ? 9 i inverting input 2in+ 8 i noninverting input 2out 10 o output 3in ? 13 i inverting input 3in+ 14 i noninverting input 3out 12 o output 4in ? 19 i inverting input 4in+ 18 i noninverting input 4out 20 o output nc 1, 5, 7, 11, 15, 17 ? do not connect vcc ? 16 ? power supply vcc+ 6 ? power supply 4 1in+ 5 nc 6 vcc+ 7 nc 8 2in+ 9 2in 10 2out 11 nc 12 3out 13 3in 14 3in+ 15 nc 16 vcc 17 nc 18 4in+ 19 4in 20 4out 1 nc 2 1out 3 1in not to scale
10 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) differential voltage only limited by input voltage. (3) the output may be shorted to ground or to either supply. temperature and supply voltages must be limited to ensure that the dissipation rating is not exceeded. 6 specifications 6.1 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) (1) min max unit v cc+ - v cc ? supply voltage ? 0.3 36 v v i input voltage (2) v cc ? ? 0.3 v cc ? + 36 v i ik input clamp current ? 50 ma duration of output short circuit (3) unlimited t j operating virtual junction temperature 150 c case temperature for 60 seconds - fk package 260 c lead temperature 1.8 mm (1/16 inch) from case for 10 seconds 300 c t stg storage temperature ? 65 150 c (1) jedec document jep155 states that 500-v hbm allows safe manufacturing with a standard esd control process. (2) jedec document jep157 states that 250-v cdm allows safe manufacturing with a standard esd control process. 6.2 esd ratings value unit v (esd) electrostatic discharge human body model (hbm), per ansi/esda/jedec js-001 (1) 2000 v charged-device model (cdm), per jedec specification jesd22- c101 (2) 1000 (1) v cc+ and v cc ? are not required to be of equal magnitude, provided that the total v cc (v cc+ ? v cc ? ) is between 10 v and 30 v. 6.3 recommended operating conditions over operating free-air temperature range (unless otherwise noted) min max unit v cc+ supply voltage (1) 5 15 v v cc ? supply voltage (1) ? 5 ? 15 v v cm common-mode voltage v cc ? + 4 v cc+ v t a operating free-air temperature tl07xm ? 55 125 c tl08xq ? 40 125 tl07xi ? 40 85 tl07xac, tl07xbc, tl07xc 0 70
11 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.4 thermal information: tl071x thermal metric (1) tl071x unit d (soic) p (pdip) ps (so) 8 pins 8 pins 8 pins r ja junction-to-ambient thermal resistance 97 85 95 c/w r jc(top) junction-to-case (top) thermal resistance ? ? ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.5 thermal information: tl072x thermal metric (1) tl072x unit d (soic) jg (cdip) p (pdip) ps (so) 8 pins 8 pins 8 pins 8 pins r ja junction-to-ambient thermal resistance 97 ? 85 95 c/w r jc(top) junction-to-case (top) thermal resistance ? 15.05 ? ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.6 thermal information: tl072x (cont.) thermal metric (1) tl072x unit pw (tssop) u (cfp) fk (lccc) 8 pins 10 pins 20 pins r ja junction-to-ambient thermal resistance 150 169.8 ? c/w r jc(top) junction-to-case (top) thermal resistance ? 62.1 5.61 c/w r jb junction-to-board thermal resistance ? 176.2 ? c/w jt junction-to-top characterization parameter ? 48.4 ? c/w jb junction-to-board characterization parameter ? 144.1 ? c/w r jc(bot) junction-to-case (bottom) thermal resistance ? 5.4 ? c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.7 thermal information: tl074x thermal metric (1) tl074x unit d (soic) n (pdip) ns (so) 14 pins 14 pins 14 pins r ja junction-to-ambient thermal resistance 86 80 76 c/w r jc(top) junction-to-case (top) thermal resistance ? ? ? c/w
12 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.8 thermal information: tl074x (cont). thermal metric (1) tl074x unit j (cdip) pw (tssop) w (cfp) 14 pins 14 pins 14 pins r ja junction-to-ambient thermal resistance ? 113 128.8 c/w r jc(top) junction-to-case (top) thermal resistance 14.5 ? 56.1 c/w r jb junction-to-board thermal resistance ? ? 127.6 c/w jt junction-to-top characterization parameter ? ? 29 c/w jb junction-to-board characterization parameter ? ? 106.1 c/w r jc(bot) junction-to-case (bottom) thermal resistance ? ? 0.5 c/w (1) for more information about traditional and new thermal metrics, see the semiconductor and ic package thermal metrics application report. 6.9 thermal information: tl074x (cont). thermal metric (1) tl074x unit fk (lccc) 20 pins r ja junction-to-ambient thermal resistance ? c/w r jc(top) junction-to-case (top) thermal resistance 5.61 c/w
13 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. (2) full range is t a = 0 c to 70 c. (3) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 6.10 electrical characteristics: tl071c, tl072c, tl074c v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 3 10 mv t a = full range 13 temperature coefficient of input offset voltage v o = 0 r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 10 na i ib input bias current (3) v o = 0 t a = 25 c 65 200 pa t a = full range 7 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 25 200 v/mv t a = full range 15 b 1 utility-gain bandwidth t a = 25 c 3 mhz r i input resistance t a = 25 c 10 12 cmrr common-mode rejection ratio v ic = v icr(min) v o = 0 r s = 50 t a = 25 c 70 100 db k svr supply voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 70 100 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
14 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. (2) full range is t a = 0 c to 70 c. (3) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 6.11 electrical characteristics: tl071ac, tl072ac, tl074ac v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 3 6 mv t a = full range 7.5 temperature coefficient of input offset voltage v o = 0 r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 2 na i ib input bias current (3) v o = 0 t a = 25 c 65 200 pa t a = full range 7 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 50 200 v/mv t a = full range 25 b 1 utility-gain bandwidth t a = 25 c 3 mhz r i input resistance t a = 25 c 10 12 cmrr common-mode rejection ratio v ic = v icr(min) v o = 0 r s = 50 t a = 25 c 75 100 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 80 100 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
15 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. (2) full range is t a = 0 c to 70 c. (3) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 6.12 electrical characteristics: tl071bc, tl072bc, tl074bc v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 2 3 mv t a = full range 5 temperature coefficient of input offset voltage v o = 0 r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 2 na i ib input bias current (3) v o = 0 t a = 25 c 65 200 pa t a = full range 7 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 50 200 v/mv t a = full range 25 b 1 utility-gain bandwidth t a = 25 c 3 mhz r i input resistance t a = 25 c 10 12 cmrr common-mode rejection ratio v ic = v icr(min) v o = 0 r s = 50 t a = 25 c 75 100 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 80 100 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
16 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. (2) t a = ? 40 c to 85 c. (3) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible. 6.13 electrical characteristics: tl071i, tl072i, tl074i v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 3 6 mv t a = full range 8 temperature coefficient of input offset voltage v o = 0 r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 2 na i ib input bias current (3) v o = 0 t a = 25 c 65 200 pa t a = full range 7 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 50 200 v/mv t a = full range 25 b 1 utility-gain bandwidth t a = 25 c 3 mhz r i input resistance t a = 25 c 10 12 cmrr common-mode rejection ratio v ic = v icr(min) v o = 0 r s = 50 t a = 25 c 75 100 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 80 100 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
17 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques that maintain the junction temperature as close to the ambient temperature as possible must be used. (2) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. full range is t a = ? 55 c to +125 c. 6.14 electrical characteristics: tl071m, tl072m v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 3 6 mv t a = full range 9 vio temperature coefficient of input offset voltage v o = 0 r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 20 na i ib input bias current v o = 0 t a = 25 c 65 200 pa t a = full range 50 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 35 200 v/mv t a = full range 15 b 1 unity-gain bandwidth 3 mhz r i input resistance 10 12 cmrr common-mode rejection ratio v ic = v icr(min) , v o = 0 r s = 50 ? t a = 25 c 80 86 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 80 86 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
18 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated (1) input bias currents of an fet-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in figure 1 . pulse techniques that maintain the junction temperature as close to the ambient temperature as possible must be used . (2) all characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. full range is t a = ? 55 c to +125 c. 6.15 electrical characteristics: tl074m v cc = 15 v (unless otherwise noted) parameter test conditions (1) (2) min typ max unit v io input offset voltage v o = 0 r s = 50 t a = 25 c 3 9 mv t a = full range 15 vio temperature coefficient of input offset voltage v o = 0, r s = 50 t a = full range 18 v/ c i io input offset current v o = 0 t a = 25 c 5 100 pa t a = full range 20 na i ib input bias current v o = 0 t a = 25 c 65 200 pa t a = full range 20 na v icr common-mode input voltage range t a = 25 c 11 ? 12 to 15 v v om maximum peak output voltage swing r l = 10 k t a = 25 c 12 13.5 v r l 10 k t a = full range 12 r l 2 k 10 a vd large-signal differential voltage amplification v o = 10 v r l 2 k t a = 25 c 35 200 v/mv t a = full range 15 b 1 unity-gain bandwidth 3 mhz r i input resistance 10 12 ? cmrr common-mode rejection ratio v ic = v icr(min) v o = 0 r s = 50 t a = 25 c 80 86 db k svr supply-voltage rejection ratio ( v cc / v io ) v cc = 9 v to 15 v v o = 0 r s = 50 t a = 25 c 80 86 db i cc supply current (each amplifier) v o = 0; no load t a = 25 c 1.4 2.5 ma v o1 / v o2 crosstalk attenuation a vd = 100 t a = 25 c 120 db
19 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 6.16 switching characteristics: tl07xm v cc = 15 v, t a = 25 c parameter test conditions min typ max unit sr slew rate at unity gain v i = 10 v c l = 100 pf r l = 2 k see figure 21 5 13 v/ s t r rise-time overshoot factor v i = 20 v c l = 100 pf r l = 2 k see figure 21 0.1 s 20% v n equivalent input noise voltage r s = 20 f = 1 khz 18 nv/ hz f = 10 hz to 10 khz 4 v i n equivalent input noise current r s = 20 f = 1 khz 0.01 pa/ hz thd total harmonic distortion v i rms = 6 v r l 2 k f = 1 khz a vd = 1 rs 1 k 0.003% 6.17 switching characteristics: tl07xc, tl07xac, tl07xbc, tl07xi v cc = 15 v, t a = 25 c parameter test conditions min typ max unit sr slew rate at unity gain v i = 10 v c l = 100 pf r l = 2 k see figure 21 8 13 v/ s t r rise-time overshoot factor v i = 20 v c l = 100 pf r l = 2 k see figure 21 0.1 s 20% v n equivalent input noise voltage r s = 20 f = 1 khz 18 nv/ hz f = 10 hz to 10 khz 4 v i n equivalent input noise current r s = 20 f = 1 khz 0.01 pa/ hz thd total harmonic distortion v i rms = 6 v r l 2 k f = 1 khz a vd = 1 rs 1 k 0.003%
20 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 6.18 typical characteristics data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices. table 1. typical characteristics: table of graphs figure i ib input bias current versus free-air temperature figure 1 v om maximum peak output voltage versus frequency figure 2 figure 3 figure 4 versus free-air temperature figure 5 versus load resistance figure 6 versus supply voltage figure 7 a vd large signal differential voltage amplification versus free-air temperature figure 8 versus load resistance figure 9 phase shift versus frequency figure 9 normalized unity-gain bandwidth versus free-air temperature figure 10 normalized phase shift versus free-air temperature figure 10 cmrr common-mode rejection ratio versus free-air temperature figure 11 input offset voltage change versus common-mode voltage figure 20 i cc supply current versus free-air temperature figure 13 versus supply voltage figure 12 p d total power dissipation versus free-air temperature figure 14 normalized slew rate versus free-air temperature figure 15 v n equivalent input noise voltage versus frequency figure 16 thd total harmonic distortion versus frequency figure 17 large-signal pulse response versus time figure 18 v o output voltage versus elapsed time figure 19
21 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 6.18.1 typical characteristics figure 1. input bias current vs free-air temperature figure 2. maximum peak output voltage vs frequency figure 3. maximum peak output voltage vs frequency figure 4. maximum peak output voltage vs frequency figure 5. maximum peak output voltage vs free-air temperature figure 6. maximum peak output voltage vs load resistance 10 m 1 m 100 k 10 k 1 k 100 f ? frequency ? hz vom ? maximum peak output v oltage ? v 0 2.5 5 7.5 10 12.5 15 see figure 2 t a = 25 c r l = 2 k ! v cc = 10 v v cc = 5 v v om v cc = 15 v 8 r l = 10 k t a = 25 c see figure 2 15 12.5 10 7.5 5 2.5 0 vom ? maximum peak output v oltage ? v f ? frequency ? hz 100 1 k 10 k 100 k 1 m 10 m v om v cc = 5 v v cc = 10 v v cc = 15 v ?75 0 vom ? maximum peak output v oltage ? v t a ? free-air temperature ? c 125 15 ?50 ?25 0 25 50 75 100 2.5 5 7.5 10 12.5 r l = 10 k ! v cc = 15 v see figure 2 v om r l = 2 k ! 8 0.1 0 r l ? load resistance ? k ! 10 15 2.5 5 7.5 10 12.5 v cc = 15 v t a = 25 c see figure 2 0.2 0.4 0.7 1 2 4 7 vom ? maximum peak output v oltage ? v v om 8 iib? input bias current ? na t a ? free-air temperature ? c ib i 10 1 0.1 0.01 100 ?75 ?50 ?25 0 25 50 75 100 125 v cc = 15 v
22 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated typical characteristics (continued) figure 7. maximum peak output voltage vs supply voltage figure 8. large-signal differential voltage amplification vs free-air temperature figure 9. large-signal differential voltage amplification and phase shift vs frequency figure 10. normalized unity-gain bandwidth and phase shift vs free-air temperature figure 11. common-mode rejection ratio vs free-air temperature figure 12. supply current per amplifier vs supply voltage 0 0 vom ? maximum peak output v oltage ? v |v cc | ? supply voltage ? v 16 15 2 4 6 8 10 12 14 2.5 5 7.5 10 12.5 r l = 10 k ! t a = 25 c v om ?75 1 voltage amplification ? v/mv t a ? free-air temperature ? c 125 1000 ?50 ?25 0 25 50 75 100 2 4 10 20 40 100 200 400 v cc = 15 v v o = 10 v r l = 2 k ! avd ? large-signal differential a vd 1.021.01 1 0.99 0.98 1.030.97 ?75 0.7 normalized unity-gain bandwidth t a ? free-air temperature ? c 125 1.3 ?50 ?25 0 25 50 75 100 0.8 0.9 1 1.1 1.2 unity-gain bandwidth v cc = 15 v r l = 2 k ! f = b 1 for phase shift phase shift normalized phase shift 0 0 | v cc | ? supply voltage ? v 16 2 2 4 6 8 10 12 14 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 t a = 25 c no signal no load icc ? supply current per amplifier ? ma cc i ?75 83 cmrr ? common-mode rejection ratio ? db t a ? free-air temperature ? c 125 89 ?50 ?25 0 25 50 75 100 84 85 86 87 88 v cc = 15 v r l = 10 k !
23 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated typical characteristics (continued) figure 13. supply current per amplifier vs free-air temperature figure 14. total power dissipation vs free-air temperature figure 15. normalized slew rate vs free-air temperature figure 16. equivalent input noise voltage vs frequency figure 17. total harmonic distortion vs frequency figure 18. voltage-follower large-signal pulse response ?75 0 t a ? free-air temperature ?c 125 250 ?50 ?25 0 25 50 75 100 25 50 75 100 125 150 175 200 225 v cc = 15 v no signal no load tl074 tl071 tl072 ? total power dissipation ? mw p d ?6 t ? time ? s 3.5 6 0 0.5 1 1.5 2 2.5 3 ?4 ?2 0 2 4 output input v cc = 15 v r l = 2 k ! t a = 25 c c l = 100 pf v o v i ? input and output v oltages ? v and 10 0 ? equivalent input noise v oltage ? nv/hz f ? frequency ? hz 100 k 50 10 20 30 40 v cc = 15 v a vd = 10 r s = 20 ! t a = 25 c 40 100 400 1 k 4 k 10 k 40 k nv/ hz v n 0.001 thd ? t otal harmonic distortion ? % 1 40 k 10 k 4 k 1 k 400 100 k f ? frequency ? hz 100 0.004 0.01 0.04 0.1 0.4 v cc = 15 v a vd = 1 v i(rms) = 6 v t a = 25 c ?75 0 t a ? free-air temperature ? c 125 2 ?50 ?25 0 25 50 75 100 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 v cc = 15 v no signal no load icc ? supply current per amplifier ? ma cc i
24 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated typical characteristics (continued) figure 19. output voltage vs elapsed time figure 20. v io vs v cm vcm (v) vio (mv) -13 -11 -9 -7 -5 -3 -1 1 3 5 7 9 11 13 15 17 -10 -8 -6 -4 -2 0 2 4 6 8 10 d003 v cc r = r 15 v
25 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 6.1 parameter measurement information figure 21. unity-gain amplifier figure 22. gain-of-10 inverting amplifier figure 23. input offset-voltage null circuit v i 10 k 1 k r l c l = 100 pf +? out v i c l = 100 pf r l = 2 k + ? out
26 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 7 detailed description 7.1 overview the jfet-input operational amplifier s in the tl07xx series are similar to the tl08x series, with low input bias and offset currents, and a fast slew rate. the low harmonic distortion and low noise make the tl07 xx series ideally suited for high-fidelity and audio preamplifier applications. each amplifier features jfet inputs (for high input impedance) coupled with bipolar output stages integrated on a single monolithic chip. the c-suffix devices are characterized for operation from 0 c to 70 c. the i-suffix devices are characterized for operation from ? 40 c to +85 c. the m-suffix devices are characterized for operation over the full military temperature range of ? 55 c to +125 c. 7.2 functional block diagram c1 v cc+ in+ v cc? 1080 1080 in? tl071 only 64 128 64 all component values shown are nominal. offset n1 offset n2 out 18 pf component count ? component type tl071 tl072 tl074 resistors 11 22 44 resistors transistors 11 14 2228 4456 transistors jfet 14 2 28 4 56 6 jfetdiodes 21 42 64 diodescapacitors 11 22 44 capacitorsepi-fet 11 22 44 ? includes bias and trim circuitry
27 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 7.3 feature description 7.3.1 total harmonic distortion harmonic distortions to an audio signal are created by electronic components in a circuit. total harmonic distortion (thd) is a measure of harmonic distortions accumulated by a signal in an audio system. these devices have a very low thd of 0.003% meaning that the tl07 x device adds little harmonic distortion when used in audio signal applications. 7.3.2 slew rate the slew rate is the rate at which an operational amplifier can change the output when there is a change on the input. these device s have a 13-v/ s slew rate. 7.4 device functional modes these devices are powered on when the supply is connected. these devices can be operated as a single-supply operational amplifier or dual-supply amplifier depending on the application.
28 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 8 application and implementation note information in the following applications sections is not part of the ti component specification, and ti does not warrant its accuracy or completeness. ti ? s customers are responsible for determining suitability of components for their purposes. customers should validate and test their design implementation to confirm system functionality. 8.1 application information a typical application for an operational amplifier is an inverting amplifier. this amplifier takes a positive voltage on the input, and makes the voltage a negative voltage. in the same manner, the amplifier makes negative voltages positive. 8.2 typical application figure 24. inverting amplifier 8.2.1 design requirements the supply voltage must be selected so the supply voltage is larger than the input voltage range and output range. for instance, this application scales a signal of 0.5 v to 1.8 v. setting the supply at 12 v is sufficient to accommodate this application. 8.2.2 detailed design procedure determine the gain required by the inverting amplifier: (1) (2) once the desired gain is determined, select a value for ri or rf. selecting a value in the kilohm range is desirable because the amplifier circuit uses currents in the milliamp range. this ensures the part does not draw too much current. this example uses 10 k for ri which means 36 k is used for rf. this is determined by equation 3 . (3) vsup+ + v out rf v in ri vsup- copyright ? 2016, texas instruments incorporated v vout a = vin v 1.8 a = 3.6 0.5 = - - v rf a = ri -
29 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated typical application (continued) 8.2.3 application curve figure 25. input and output voltages of the inverting amplifier 8.3 unity gain buffer figure 26. single-supply unity gain amplifier 8.3.1 design requirements ? v cc must be within valid range per recommended operating conditions . this example uses a value of 12 v for v cc . ? input voltage must be within the recommended common-mode range, as shown in recommended operating conditions . the valid common-mode range is 4 v to 12 v ( v cc ? + 4 v to v cc+ . ? output is limited by output range, which is typically 1.5 v to 10.5 v, or v cc ? + 1.5 v to v cc+ ? 1.5 v. 8.3.2 detailed design procedure ? avoid input voltage values below 1 v to prevent phase reversal where output goes high. ? avoid input values below 4 v to prevent degraded v io that results in an apparent gain greater than 1. this may cause instability in some second-order filter designs. -2 -1.5 -1 -0.5 0 0.5 1 1.5 2 0 0.5 1 1.5 2 volts time (ms) vin vout + + + 12 10 k u1 tl072 vout copyright ? 2017, texas instruments incorporated vin
30 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated unity gain buffer (continued) 8.3.3 application curves figure 27. output voltage vs input voltage figure 28. gain vs input voltage 8.4 system examples figure 29. 0.5-hz square-wave oscillator figure 30. high-q notch filter r1 input r2 c3 c1 c1 r3 output v ccC C + v cc+ o r1 r2 2r3 1.5 m c3 c1 c2 110 pf 2 1 f 1khz 2 r1 c1 = = = w = = = = = p vin (v) gain (v/v) 0 2 4 6 8 10 12 -1.5 -1 -0.5 0 0.5 1 1.5 d002 vin (v) vout (v) 0 2 4 6 8 10 12 0 2 4 6 8 10 12 d001
31 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated system examples (continued) figure 31. 100-khz quadrature oscillator figure 32. ac amplifier
32 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 9 power supply recommendations caution supply voltages larger than 36 v for a single-supply or outside the range of 18 v for a dual-supply can permanently damage the device (see the absolute maximum ratings ). place 0.1- f bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high- impedance power supplies. for more detailed information on bypass capacitor placement, see layout . 10 layout 10.1 layout guidelines for best operational performance of the device, use good pcb layout practices, including: ? noise can propagate into analog circuitry through the power pins of the circuit as a whole, as well as the operational amplifier. bypass capacitors are used to reduce the coupled noise by providing low impedance power sources local to the analog circuitry. ? connect low-esr, 0.1- f ceramic bypass capacitors between each supply pin and ground, placed as close to the device as possible. a single bypass capacitor from v+ to ground is applicable for single- supply applications. ? separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective methods of noise suppression. one or more layers on multilayer pcbs are usually devoted to ground planes. a ground plane helps distribute heat and reduces emi noise pickup. take care to physically separate digital and analog grounds, paying attention to the flow of the ground current. for more detailed information, see circuit board layout techniques . ? to reduce parasitic coupling, run the input traces as far away from the supply or output traces as possible. if it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular as opposed to in parallel with the noisy trace. ? place the external components as close to the device as possible. keeping rf and rg close to the inverting input minimizes parasitic capacitance, as shown in layout example . ? keep the length of input traces as short as possible. always remember that the input traces are the most sensitive part of the circuit. ? consider a driven, low-impedance guard ring around the critical traces. a guard ring can significantly reduce leakage currents from nearby traces that are at different potentials.
33 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 10.2 layout example figure 33. operational amplifier board layout for noninverting configuration figure 34. operational amplifier schematic for noninverting configuration + rin rg rf vout vin nc vcc+ in1 in1+ vcc nc out nc rg rin rf gnd vin vs- gnd vs+ gnd run the input traces as far away from the supply lines as possible only needed for dual-supply operation place components close to device and to each other to reduce parasitic errors use low-esr, ceramic bypass capacitor (or gnd for single supply) ground (gnd) plane on another layer vout
34 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m slos080n ? september 1978 ? revised july 2017 www.ti.com product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 11 device and documentation support 11.1 documentation support 11.1.1 related documentation for related documentation, see the following: circuit board layout techniques (sloa089) 11.2 related links the table below lists quick access links. categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. table 2. related links parts product folder order now technical documents tools & software support & community tl071 click here click here click here click here click here tl071a click here click here click here click here click here tl071b click here click here click here click here click here tl072 click here click here click here click here click here tl072a click here click here click here click here click here tl072b click here click here click here click here click here tl072m click here click here click here click here click here tl074 click here click here click here click here click here tl074a click here click here click here click here click here tl074b click here click here click here click here click here tl074m click here click here click here click here click here 11.3 community resources the following links connect to ti community resources. linked contents are provided "as is" by the respective contributors. they do not constitute ti specifications and do not necessarily reflect ti's views; see ti's terms of use . ti e2e ? online community ti's engineer-to-engineer (e2e) community. created to foster collaboration among engineers. at e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. design support ti's design support quickly find helpful e2e forums along with design support tools and contact information for technical support. 11.4 trademarks e2e is a trademark of texas instruments. all other trademarks are the property of their respective owners. 11.5 electrostatic discharge caution these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 11.6 glossary slyz022 ? ti glossary . this glossary lists and explains terms, acronyms, and definitions.
35 tl071 , tl071a , tl071b tl072 , tl072a , tl072b , tl074 , tl074a , tl074b , tl072m , tl074m www.ti.com slos080n ? september 1978 ? revised july 2017 product folder links: tl071 tl071a tl071b tl072 tl072a tl072b tl074 tl074a tl074b tl072m tl074m submit documentation feedback copyright ? 1978 ? 2017, texas instruments incorporated 12 mechanical, packaging, and orderable information the following pages include mechanical packaging and orderable information. this information is the most current data available for the designated devices. this data is subject to change without notice and revision of this document. for browser based versions of this data sheet, refer to the left hand navigation.
package option addendum www.ti.com 26-sep-2018 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples 81023052a active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 81023052a tl072mfkb 8102305ha active cfp u 10 1 tbd a42 n / a for pkg type -55 to 125 8102305ha tl072m 8102305pa active cdip jg 8 1 tbd a42 n / a for pkg type -55 to 125 8102305pa tl072m 81023062a active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 81023062a tl074mfkb 8102306ca active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 8102306ca tl074mjb 8102306da active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 8102306da tl074mwb jm38510/11905bpa active cdip jg 8 1 tbd a42 n / a for pkg type -55 to 125 jm38510 /11905bpa m38510/11905bpa active cdip jg 8 1 tbd a42 n / a for pkg type -55 to 125 jm38510 /11905bpa tl071acd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 071ac tl071acdg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 071ac tl071acdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 071ac tl071acp active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl071acp tl071bcd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 071bc tl071bcdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 071bc tl071bcp active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl071bcp tl071cd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl071c tl071cdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl071c
package option addendum www.ti.com 26-sep-2018 addendum-page 2 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tl071cdre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl071c tl071cdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl071c tl071cp active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl071cp tl071cpe4 active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl071cp tl071cpsr active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t071 tl071id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl071i tl071idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl071i tl071idrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl071i tl071ip active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type -40 to 85 tl071ip tl072acd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072ac tl072acde4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072ac tl072acdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072ac tl072acdre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072ac tl072acdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072ac tl072acp active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 tl072acp tl072acpe4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 tl072acp tl072bcd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072bc tl072bcde4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072bc
package option addendum www.ti.com 26-sep-2018 addendum-page 3 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tl072bcdg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072bc tl072bcdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072bc tl072bcdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 072bc tl072bcp active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 tl072bcp tl072bcpe4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type 0 to 70 tl072bcp tl072cd active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cde4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cdg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cdr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cdre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cdrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl072c tl072cp active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl072cp tl072cpe4 active pdip p 8 50 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl072cp tl072cpsr active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072 tl072cpsre4 active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072 tl072cpsrg4 active so ps 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072 tl072cpwr active tssop pw 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072 tl072cpwre4 active tssop pw 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072
package option addendum www.ti.com 26-sep-2018 addendum-page 4 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tl072cpwrg4 active tssop pw 8 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t072 tl072id active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072ide4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072idg4 active soic d 8 75 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072idr active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072idre4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072idrg4 active soic d 8 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl072i tl072ip active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 tl072ip tl072ipe4 active pdip p 8 50 pb-free (rohs) cu nipdau n / a for pkg type -40 to 85 tl072ip tl072mfkb active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 81023052a tl072mfkb tl072mjg active cdip jg 8 1 tbd a42 n / a for pkg type -55 to 125 tl072mjg tl072mjgb active cdip jg 8 1 tbd a42 n / a for pkg type -55 to 125 8102305pa tl072m tl072mub active cfp u 10 1 tbd a42 n / a for pkg type -55 to 125 8102305ha tl072m tl074acd active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074ac tl074acde4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074ac tl074acdr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074ac tl074acdre4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074ac tl074acdrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074ac
package option addendum www.ti.com 26-sep-2018 addendum-page 5 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tl074acn active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074acn tl074acne4 active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074acn tl074acnsr active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074a tl074bcd active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074bc tl074bcde4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074bc tl074bcdr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074bc tl074bcdre4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074bc tl074bcdrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074bc tl074bcn active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074bcn tl074bcne4 active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074bcn tl074cd active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074c tl074cdbr active ssop db 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t074 tl074cdg4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074c tl074cdr active soic d 14 2500 green (rohs & no sb/br) cu nipdau | cu sn level-1-260c-unlim 0 to 70 tl074c tl074cdrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074c tl074cn active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074cn tl074cne4 active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type 0 to 70 tl074cn tl074cnsr active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074
package option addendum www.ti.com 26-sep-2018 addendum-page 6 orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples tl074cnsrg4 active so ns 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 tl074 tl074cpw active tssop pw 14 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t074 tl074cpwr active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t074 tl074cpwre4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t074 tl074cpwrg4 active tssop pw 14 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim 0 to 70 t074 tl074id active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074ide4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074idg4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074idr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074idre4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074idrg4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim -40 to 85 tl074i tl074in active pdip n 14 25 green (rohs & no sb/br) cu nipdau n / a for pkg type -40 to 85 tl074in tl074mfk active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 tl074mfk tl074mfkb active lccc fk 20 1 tbd post-plate n / a for pkg type -55 to 125 81023062a tl074mfkb tl074mj active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 tl074mj tl074mjb active cdip j 14 1 tbd a42 n / a for pkg type -55 to 125 8102306ca tl074mjb tl074mwb active cfp w 14 1 tbd a42 n / a for pkg type -55 to 125 8102306da tl074mwb (1) the marketing status values are defined as follows: active: product device recommended for new designs.
package option addendum www.ti.com 26-sep-2018 addendum-page 7 lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) rohs: ti defines "rohs" to mean semiconductor products that are compliant with the current eu rohs requirements for all 10 rohs substances, including the requirement that rohs substance do not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, "rohs" products are suitable for use in specified lead-free processes. ti may reference these types of products as "pb-free". rohs exempt: ti defines "rohs exempt" to mean products that contain lead but are compliant with eu rohs pursuant to a specific eu rohs exemption. green: ti defines "green" to mean the content of chlorine (cl) and bromine (br) based flame retardants meet js709b low halogen requirements of <=1000ppm threshold. antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. other qualified versions of tl072, tl072m, tl074, tl074m : ? catalog: tl072 , tl074 ? enhanced product: TL072-EP , TL072-EP , tl074-ep , tl074-ep ? military: tl072m , tl074m note: qualified version definitions:
package option addendum www.ti.com 26-sep-2018 addendum-page 8 ? catalog - ti's standard catalog product ? enhanced product - supports defense, aerospace and medical applications ? military - qml certified for military and defense applications
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tl071acdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl071bcdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl071cdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl071cdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl071cpsr so ps 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 tl071idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072acdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072bcdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072cdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072cdr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072cpsr so ps 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 tl072cpwr tssop pw 8 2000 330.0 12.4 7.0 3.6 1.6 8.0 12.0 q1 tl072idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl072idr soic d 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 q1 tl074acdr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 tl074acnsr so ns 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 q1 tl074bcdr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 tl074cdbr ssop db 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 q1 package materials information www.ti.com 27-sep-2018 pack materials-page 1
device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant tl074cdr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 tl074cdrg4 soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 tl074cpwr tssop pw 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 q1 tl074idr soic d 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 q1 *all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) tl071acdr soic d 8 2500 340.5 338.1 20.6 tl071bcdr soic d 8 2500 340.5 338.1 20.6 tl071cdr soic d 8 2500 340.5 338.1 20.6 tl071cdr soic d 8 2500 367.0 367.0 35.0 tl071cpsr so ps 8 2000 367.0 367.0 38.0 tl071idr soic d 8 2500 340.5 338.1 20.6 tl072acdr soic d 8 2500 340.5 338.1 20.6 tl072bcdr soic d 8 2500 340.5 338.1 20.6 tl072cdr soic d 8 2500 340.5 338.1 20.6 tl072cdr soic d 8 2500 367.0 367.0 35.0 tl072cpsr so ps 8 2000 367.0 367.0 38.0 tl072cpwr tssop pw 8 2000 367.0 367.0 35.0 tl072idr soic d 8 2500 340.5 338.1 20.6 package materials information www.ti.com 27-sep-2018 pack materials-page 2
device package type package drawing pins spq length (mm) width (mm) height (mm) tl072idr soic d 8 2500 367.0 367.0 35.0 tl074acdr soic d 14 2500 333.2 345.9 28.6 tl074acnsr so ns 14 2000 367.0 367.0 38.0 tl074bcdr soic d 14 2500 333.2 345.9 28.6 tl074cdbr ssop db 14 2000 367.0 367.0 38.0 tl074cdr soic d 14 2500 333.2 345.9 28.6 tl074cdrg4 soic d 14 2500 333.2 345.9 28.6 tl074cpwr tssop pw 14 2000 367.0 367.0 35.0 tl074idr soic d 14 2500 333.2 345.9 28.6 package materials information www.ti.com 27-sep-2018 pack materials-page 3

www.ti.com package outline c 14x .008-.014 [0.2-0.36] typ -15 0 at gage plane -.314.308 -7.977.83[ ] 14x -.026.014 -0.660.36[ ] 14x -.065.045 -1.651.15[ ] .2 max typ [5.08] .13 min typ [3.3] typ -.060.015 -1.520.38[ ] 4x .005 min [0.13] 12x .100 [2.54] .015 gage plane [0.38] a -.785.754 -19.94 19.15[ ] b -.283.245 -7.196.22[ ] cdip - 5.08 mm max height j0014a ceramic dual in line package 4214771/a 05/2017 notes: 1. all controlling linear dimensions are in inches. dimensions in brackets are in millimeters. any dimension in brackets or parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. this package is hermitically sealed with a ceramic lid using glass frit. 4. index point is provided on cap for terminal identification only and on press ceramic glass frit seal only. 5. falls within mil-std-1835 and gdip1-t14. 7 8 14 1 pin 1 id (optional) scale 0.900 seating plane .010 [0.25] c a b
www.ti.com example board layout all around [0.05] max.002 .002 max [0.05] all around solder mask opening metal (.063) [1.6] (r.002 ) typ [0.05] 14x ( .039) [1] ( .063) [1.6] 12x (.100 ) [2.54] (.300 ) typ [7.62] cdip - 5.08 mm max height j0014a ceramic dual in line package 4214771/a 05/2017 land pattern example non-solder mask defined scale: 5x see detail a see detail b symm symm 1 7 8 14 detail a scale: 15x solder mask opening metal detail b 13x, scale: 15x

mechanical data mcer001a january 1995 revised january 1997 post office box 655303 ? dallas, texas 75265 jg (r-gdip-t8) ceramic dual-in-line 0.310 (7,87) 0.290 (7,37) 0.014 (0,36) 0.008 (0,20) seating plane 4040107/c 08/96 5 4 0.065 (1,65) 0.045 (1,14) 8 1 0.020 (0,51) min 0.400 (10,16) 0.355 (9,00) 0.015 (0,38) 0.023 (0,58) 0.063 (1,60) 0.015 (0,38) 0.200 (5,08) max 0.130 (3,30) min 0.245 (6,22) 0.280 (7,11) 0.100 (2,54) 0 15 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. this package can be hermetically sealed with a ceramic lid using glass frit. d. index point is provided on cap for terminal identification. e. falls within mil std 1835 gdip1-t8

www.ti.com package outline c typ 6.6 6.2 1.2 max 6x 0.65 8x 0.30 0.19 2x 1.95 0.15 0.05 (0.15) typ 0 - 8 0.25 gage plane 0.75 0.50 a note 3 3.1 2.9 b note 4 4.5 4.3 4221848/a 02/2015 tssop - 1.2 mm max height pw0008a small outline package notes: 1. all linear dimensions are in millimeters. any dimensions in parenthesis are for reference only. dimensioning and tolerancing per asme y14.5m. 2. this drawing is subject to change without notice. 3. this dimension does not include mold flash, protrusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. this dimension does not include interlead flash. interlead flash shall not exceed 0.25 mm per side. 5. reference jedec registration mo-153, variation aa. 1 8 0.1 c a b 5 4 pin 1 id area seating plane 0.1 c see detail a detail a typical scale 2.800
www.ti.com example board layout (5.8) 0.05 max all around 0.05 min all around 8x (1.5) 8x (0.45) 6x (0.65) (r ) typ 0.05 4221848/a 02/2015 tssop - 1.2 mm max height pw0008a small outline package symm symm land pattern example scale:10x 1 4 5 8 notes: (continued) 6. publication ipc-7351 may have alternate designs. 7. solder mask tolerances between and around signal pads can vary based on board fabrication site. metal solder mask opening non solder mask defined solder mask details not to scale solder mask opening metal under solder mask solder mask defined
www.ti.com example stencil design (5.8) 6x (0.65) 8x (0.45) 8x (1.5) (r ) typ 0.05 4221848/a 02/2015 tssop - 1.2 mm max height pw0008a small outline package notes: (continued) 8. laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. ipc-7525 may have alternate design recommendations. 9. board assembly site may have different recommendations for stencil design. symm symm 1 4 5 8 solder paste example based on 0.125 mm thick stencil scale:10x
mechanical data msso002e ? january 1995 ? revised december 2001 post office box 655303 ? dallas, texas 75265 db (r-pdso-g**) plastic small-outline 4040065 /e 12/01 28 pins shown gage plane 8,20 7,40 0,55 0,95 0,25 38 12,90 12,30 28 10,50 24 8,50 seating plane 9,90 7,90 30 10,50 9,90 0,38 5,60 5,00 15 0,22 14 a 28 1 20 16 6,50 6,50 14 0,05 min 5,90 5,90 dim a max a min pins ** 2,00 max 6,90 7,50 0,65 m 0,15 0 ? 8 0,10 0,09 0,25 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-150
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